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4GS/s 8bit ADC Chip and 3GS/s 12bit DAC Chip Developed in IMECAS
Author: Dept.4 HOU Jiqiang;Translate by WANG Fang
Update time: 2013-05-29
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4GS/s 8bit Analog Digital Converter (ADC) chip and 3GS/s 12bit Digital Analog Converter (DAC) chip designed by the Microwave Devices and Integrated Circuits Department (Department No.4) of the Institute of Microelectronics of Chinese Academy of Sciences (IMECAS), have been successfully developed in Late-May 2013.

4GS/s 8bit ADC Chip consists of 2 circuits of ADCs. Each road is integrated with wide-band sample-and-hold circuits and designed by structural shape optimization of Folding/Interpolating. Inner-structure of the chip is integrated with SPI program interface, which can calibrate the offset between two ADC circuits and make the ADC Working Mode more flexible. This 4GS/s 8bit ADC Chip has been fabricated by domestic technology. Significant digit in test is larger than 7.0 bit. Input signal simulation bandwidth is 1.5GHz. The chip has the highest maximum sampling frequency of 8bit ADC in China up to now.

More than this, another research achievement, 3GS/s 12bit DAC Chip, also has the highest maximum sampling frequency of 12bit DAC in China up to now. Simulated test shows that the chip achieves a Spurious Free Dynamic Range (SFDR) of 72dBc, which has already arrived at an international advanced level. This DAC employs segmented current-steering architecture, and is integrated with Low-Voltage Differential Signaling (LVDS) receiver, supporting Return-to-Zero (RZ) output, which made the chip reliable and practicable.



Figure 1. 4GS/s 8bit Interleaved ADC Architecture (Image by IMECAS)


Figure 2. 3GS/s 12bit DAC Chip Photo & Spectrum Test (Image by IMECAS)


Figure 3. 4GS/s 8bit ADC Chip Photo & Test Result (Image by IMECAS)

Researcher JIN Zhi
Institute of Microelectronics of Chinese Academy of Sciences
E-mail: jinzhi@ime.ac.cn
Website of Dept.:


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