Recently, scientists from Intelligent Perception Center of the Institute of Microelectronics of Chinese Academy of Sciences (IMECAS) developed the first intelligent digital hearing aid System-on-a-Chip (SoC) in China.
The SoC uses a single chip integrated solution, as shown in Fig.1. The chip integrated power supply LDO (Low Dropout Regulator), clock oscillator RC (Resistance-Capacitance) circuits, low noise AFE (Active Front End), Low power DSP (Digital Signal Processor) and High precision audio output DAC(Digital to Analog Converter). Among them, the AFE includes adaptive PGA (Programmable Gain Amplifier) and low- noise 16-bit Sigma-Delta ADC (Analog to Digital Converter). Low power DSP includes an ASIP (Application-Specific Instruction-set Processor) and some co-processors. Based on this hearing aid SoC, equipped with a microphone, speakers, EEPROM (Electrically Erasable Programmable Read-Only Memory), zinc air battery and a small amount of capacitance, a typical hearing aid system can be built. The SoC can also be applied to other areas such as voice acquisition and speech noise-reduction equipment.
Fig.1 Low Power Hearing Aid SoC Diagram (Image by IMECAS)
The hearing aid SoC works under 1-V voltage and 8-MHz clock frequency. The total operational current is 1.2mA. The SoC, hardware system and prototype are shown in Fig.2 and Fig.3 respectively.
Fig.2 Hearing Aid SoC, QFN40L Chip and Hardware System (Image by IMECAS)
Fig.3 Hearing Aid Prototype (Image by IMECAS)
The electrical test results of hearing aid prototype are shown in Fig.4. Max SPL is 122.3dB. Max gain is 52.6Db. Equivalent input noise is 25.5dB. In total harmonic distortion (THD) test, the harmonic distortion is 0.2%@1600Hz. Total power consumption is 1.22mW.
Fig.4 The Test Environment and Results of Hearing Aid Prototype (Image by IMECAS)
Researcher YAN Yuepeng