On October 8th 2013, Prof. Hiroshi Iwai from the Tokyo Institute of Technology visited the Institute of Microelectronics of Chinese Academy of Sciences (IMECAS). With Prof. LIU Ming's arrangement, he delivered a lecture entitled “Future of Nano CMOS Technology” in IMECAS hosted by Prof. Ming Liu, the director of Lab of Nanofabrication and Novel Device Integration Technology. More than 40 local professionals and graduate students attended the meeting.
Prof. Iwai first introduced the development of CMOS would reach its limits after the next decade because of the difficulties in downsizing and some fundamental limits of MOSFETs and the development of new technologies to pursue the downsizing of CMOS for another decade. He talked about the current status of the frontend of the technology, continuous innovation of High-k/metal gate technologies and recent advances in new channel material such as III-V/Ge. Prof. Iwai also explained that device demonstration on emerging technologies (such as Tunnel FET, Junctionless FET, Carbon-based FET.) was increasing, but we could not draw a successful story to replace the Si-CMOS and much longer time was needed for implementation of these technologies in future generation devices. The new points of his research on SONOS flash memory devices made a big splash and reached an academic discussion.
After the lecture, a symposium was held with the participating researchers from the Laboratory of Nanofabrication and Novel Device Integration Technology of IMECAS, both sides introduced their recent works and had a heated discussion.
Professor YE TIANCHUN, Director of IMECAS (right) Gave the Letter of Visiting Professorship Appointment to Professor Hiroshi Iwai (left). (Image by IMECAS)
Hiroshi Iwai received the B.E. and Ph.D. degrees in electrical engineering from the University of Tokyo and worked in the research and development of integrated circuit technology for more than 25 years in Toshiba. He is now a professor of Frontier Research Center and Dept. of Electronics and Applied Physics, Interdisciplinary Graduate School of Science and Engineering, Tokyo Institute of Technology, Yokohama, Japan. Since joining Toshiba, he has developed several generations of high density static RAM's, dynamic RAM's and logic LSI's including CMOS, bipolar, and Bi-CMOS devices. He has also been engaged in research on device physics, process technologies, and T-CAD related to small-geometry MOSFETs and high speed bipolar transistors. He has authored and coauthored more than 1,000 international and 400 domestic journal/conference papers. His current research interests are Nano CMOS, Power and Photovoltaic Devices: Si Nanowire and III-V MOSFETs, GaN & Diamond Power devices, Si-nanowire & silicide photovoltaic devices, and High-k gate insulator & Metal/silicide S/D technologies. Dr. Iwai is, a fellow of IEEE, a fellow of Institute of Electrical Engineers Japan, a fellow of the Japan Society Applied Physics, and a fellow of the Institute of Electronics, Information and Communication Engineers of Japan. He is a recipient of many prize and awards such as J.J. Ebers Award, Prizes for Science and Technology by the Minister of Education, Japan.