Name:HUO Zongliang
Gender:Male
Titl:Professor
Nationality:China
Education:Ph.D
E-Mail:huozongliang@ime.ac.cn
Address:3 Beitucheng West Road, Chaoyang District, Beijing, PR China
Postcode:100029
Tel:010-82995798

Education Background:
1994.9– 1998.7 Peking University, The department of computer science & technology. B.A
Major: Microelectronics and Solid-state electronics
1998.9– 2003.7 Peking University, The institute of microelectronics Ph.D
Major: Microelectronics and Solid-state electronics
Professional Experience:
2003.9–2010.2 Semiconductor R&D Center, Samsung semiconductor, Samsung Electronics, Korea
2010.3 – The institute of microelectronics of Chinese academy of sciences. China

Research Interests:
Novel semiconductor memory technology

Publications:
ZongLiang Huo, JunKyu Yang, SeungHyun Lim, SeungJae Baik, Juyul Lee, Jeong Hee Han, In-Seok Yeo, U-In Chung,Joo Tae Moon and Byung-Ii Ryu. “Band Engineered Charge Trap Layer for highly Reliable MLC Flash Memory”, IEEE Sym. on VLSI Tech. 2007 (VLSI-2007) pp. 138-139
ZongLiang Huo, SeungJae Baik, Shieun Kim, In-Seok Yeo, U-In Chung, Joo-Tae Moon,” Sub-6F2 Charge Trap Dynamic Random Access Memory Using a Novel Operation Scheme” IEEE 64th Device Research Conference(DRC2006), 2006, pp. 261
Shieun Kim, Seung Jae Baik, Zongliang Huo, Young-Jin Noh, Chulsung Kim, Jeong Hee Han, In-Seok Yeo, U-In Chung, Joo Tae Moon, Byung-Il Ryu, “Robust multi-bit programmable flash memory using a resonant tunnel barrier”, IEEE International Electron Devices Meeting Technical Digest, 2005.( IEDM2005), pp.861-864.
Seung Jae Baik; Zongliang Huo; Seung-Hyun Lim; In-Seok Yeo; Siyoung Choi; U-In Chung; Joo Tae Moon, “STTM -promising nanoelectronic DRAM device”, 4th IEEE Conference on Nanotechnology, 2004.pp.45-46
Dandan Jiang, Zongliang Huo, Manhong Zhang, Qin Wang, Jing Liu, Zhaoan Yu, Xiaonan Yang, Yong Wang, Bo Zhang, Junning Chen and Ming Liu” Performance Improvement of Si-NC memory device by using a novel programming scheme“, CSTIC 2011, Best Student Paper
Chenxin Zhu, Zongliang Huo, Zhongguang Xu, Manhong Zhang, Qin Wang, Jing Liu,Shibing Long, and Ming Liu” Performance enhancement of multi-level cell nonvolatile memory by using a band-gap engineered high-к trapping layer“, Applied Physics Letters， 97，253503，2010, APL Research Highlight Paper
Zhiwei Zheng, Zongliang Huo, Manhong Zhang, Chenxin Zhu, Jing Liu and Ming Liu， “Improved speed and data retention characteristics in flash memory using a stacked HfO2/Ta2O5 charge-trapping layer , Semicond. Sci. Technol. 26 (2011) 105015
Dandan Jiang, Manhong Zhang, Zongliang Huo, Qin Wang, Jing Liu, Zhaoan Yu, Xiaonan Yang, Yong Wang, Bo Zhang, Junning Chen and Ming Liu A Study of Cycling Induced Degradation Mechanisms in Si Nanocrystal Memory Devices” Nanotechnology，22，254009，2011
Yong Wang, Xiaonan Yang, Qin Wang, Shibing Long, Manhong Zhang, Zongliang Huo Bo Zhang, Ming Liu, “Optimization of Silicon Nanocrystals Growth Process by LPCVD for Non-Volatile Memory Application”, Thin Solid Films, vol. 519, issue 7, p2146
Qi Liu, Shibing Long, Hangbing Lv, Wei Wang, ,Jiebin Niu, Zongliang Huo, Junning Chen, and Ming Liu, “Controllable growth of nanoscale conductive filaments in solid - electrolyte -based ReRAM by using metal nanocrystal cover bottom electrode“, ACS Nano，4 (10)，6162-6168，2010
Yuhui He,Ralph H. Scheicher, Anton Grigoriev, Rajeev Ahuja, Shibing Long, ZongLiang Huo, and Ming Liu, “Enhanced DNA sequencing performance through edge- hydrogenation of graphene electrodes”, Advanced Functional Materials 21(14), pp. 2674–2679, 2011

Patents Application:
More than 80 patents are applied. The list is partial U.S.A patent application.
Zongliang Huo, Seung-Jae Baik, In-Seok Yeo, “Semiconductor Memory Devices And Methods of fabricating the same”, US 7274066 B2
Zongliang Huo, Seung-Jae Baik, In-Seok Yeo, Hong-Sik Yoon, Shi-Eun Kim,” SRAM cells having inverters and access transistors therein with vertical Fin-Shaped Active regions” US 7368788B2
Zongliang Huo, Seung-Jae Baik, In-Seok Yeo, Hong-Sik Yoon, Shi-Eun Kim , “Methods of fabricating a single transistor floating body DRAM cell having recess channel transistor structure” , US 7338862 B2
Zongliang Huo, Subramanya Mayya, Xiaofeng Wang, In-Seok Yeo, “Methods of forming nano line structures in microelectronic devices and related devices, ” US 7863138 B2
Zongliang Huo, Seung-Jae Baik, In-Seok Yeo, Hong-Sik Yoon, Shi-Eun Kim, “Single transistor floating-body DRAM devices having vertical channel transistor structures and methods of fabricating the same”, Pub. No, US 2006/0249770 A1
ZongLiang Huo, In-Seok Yeo, “Semiconductor memory device having DRAM cell mode and non-volatile memory cell mode and operation method therefore”, Pub. No, US2008/0048239 A1
ZongLiang Huo, Yeo Inseok Seung HyunLim ,Joo KyongHee, Yang JunKyu, “ Charge trap flash memory device and memory card and system including the same” Pub. No, US 2008/0246078 A1
Zongliang Huo, Seung-Jae Baik, In-Seok Yeo, Hong-Sik Yoon, Shi-Eun Kim , “Single Transistor Floating body DRAM cell Having recess channel transistor structure” , Pub. No, US 2008/0128802 A1
Zongliang Huo, SunJung Kim, SeungMoon Shin, MinBoo Lee, Kihyun Hwang, “Source/Drain Engineering for WOC improvement in VNAND Flash Memory” Pub. No, US2010/0579641
Hong-Sik Yoon, In-Seok Yeo, Seung-Jae Baik, Zong-Liang Huo, Shi-Eun Kim,” DRAM Device and methods of manufacturing the same”, US 7384841 B2
Shi-Eun Kim, Seung-Jae Baik, Zong-liang Huo, In-Seok Yeo, Seung-hyun lim, Jeong-Hee Han“Multi-bit storageable non-volatile memory device”, Pub.No. US 2007/0007576 A1
Jun-kyu Yang,Seung-Jae Baik,Jin-tae NOH,Seung-hyun Lim,Kyong-Hee Joo,Zong-Liang Huo, “Flash memory device with hybrid structure charge trap layer and method of manufacturing same,” Pub.No, US 2008/0169501 A1
Hong-Sik Yoon, In-Seok Yeo, Seung-Jae Baik, Zong-Liang Huo, Shi-Eun Kim” DRAM Device and methods of manufacturing the same, Appl. No. 12/149,406
Kim ByongJu, Kim Sunjung, Huo ZongLiang ,Yang Junkyu, Jo Seon-Ho ,Choi hanmei ,Kim YoungSun “NVM cell having new blocking barrier layer”, Appl. No. 382646