Name:XU Qiang
Gender:Male
Title:Associate Professor
Nationality:P.R.China
Education:Master
E-Mail: xuqiang1@ime.ac.cn
Department:Three Dimensional Memory Technology Center
Address:3 Beitucheng West Road, Chaoyang District, Beijing, PR China
Postcode:100029
Education Background:
2016/9 – now University of Chinese Academy of Sciences Microelectronics and solid PhD（Under graduate）
2003/9 -- 2006/6 Beijing University of Chemical Technology Material Science Master
1999/9 -- 2003/7 Beijing University of Chemical Technology Material Science Bachelor
Professional Experience:
2012.05-Now IMECAS
2011.01-2012.05 Shanghai Huali Microelectronics Corporation
2006.07-2010.12 Semiconductor Manufacturing International Corporation (Beijing)
Research Interests:
Advanced 3D NAND Flash BEOL integration related
Publications:
Qiang Xu, Jun Luo, Guilei Wang, et al. “Application of ALD W films as gate filling metal in 22 nm HKMG-last integration: Evaluation and improvement of the adhesion in CMP process.” Microelectronic Engineering,137 (2), 43-46 (2015)
Li Xinkai, Huo Zongliang, Jin Lei, Jiang Dandan, Hong Peizhen, Xu Qiang, et al. “Impact of continuing scaling on the device performance of 3D cylindrical junction-less charge trapping memory.” Journal of Semiconductors,36(9), (2015)
Guilei Wang, Qiang Xu, Tao Yang, et. al, “Application of Atomic Layer Deposition Tungsten (ALD W) as Gate Filling Metal for 22 nm and Beyond Nodes CMOS Technology.” ECS Journal of Solid State Science and Technology, 3 (4), 82-85 (2014)
Lichuan Zhao, Zhaoyun Tang, Bo Tang [...], Jian Zhong, Qiang Xu, Wenwu Wang, Junfeng Li, Huilong Zhu, Chao Zhao, Jiang Yan, Dapeng Chen, Simon Yang, Tianchun Ye, “Mitigation of Reverse Short-Channel Effect With Multilayer TiN/Ti/TiN Metal Gates in Gate Last PMOSFETs.” IEEE Electron Device Letters 08/2014; 35(8):811-813.
Tao Yang, Guilei Wang, Qiang Xu, Yihong Lu, Jiahan Yu, Hushan Cui, Jiang Yan, Junfeng Li, Chao Zhao. “ALD W CMP characteristic for HKMG integration.” 224th ECS Meeting; 10/2013
