Name

HUANG Sen

Gender

Male

Title

Professor

Nationality

China

Education

Ph.D

E-Mail

huangsen@ime.ac.cn

Department

R&D Center of High Frequency & High Voltage Devices and Integrated Technology,

Institute of Microelectronics of Chinese Academy of Sciences

Address

3 Beitucheng West Road, Chaoyang District, Beijing, PR China

Postcode

100029

Tel

+86-10-8299- 5587

Fax

+86-10-6202-1601

Education Background

PhD of Semiconductor (condensed matter) Physics, Peking University (PKU), Sep. 2004 - Jul. 2009;

Bachelor of Electronic Science and Technology, Dalian University of Technology (DUT), Sep. 2000 - Jul. 2004

Professional Experience

Professor in R&D Center of High Frequency & High Voltage Devices and Integrated Technology, Institute of Microelectronics, Chinese Academy of Sciences (IMECAS), April. 2017 – present;

Associate Professor in R&D Center of High Frequency & High Voltage Devices and Integrated Technology , IMECAS, Aug. 2012 –Mar. 2017;

Postdoctoral Research Associate in Department of Electronic and Computer Engineering, The Hong Kong University of Science and Technology (HKUST), Aug. 2009 - Aug. 2012

Publications

1.       R. Zhao, S. Huang*, et al., “Interface charge engineering in down-scaled AlGaN (<6 nm)/GaN heterostructure for fabrication of GaN-based power HEMTs and MIS-HEMTs,” Applied Physics Letters, vol. 116, no. 10, p. 103502, Mar. 2020.

2.       S. Huang, et al., “Capture and emission mechanisms of defect states at interface between nitride semiconductor and gate oxides in GaN-based metal-oxide-semiconductor power transistors,” Journal of Applied Physics, vol. 126, no. 16, p. 164505, Oct. 2019.

3.       S. Huang, et al., “Monolithic integration of E/D-mode GaN MIS-HEMTs on ultrathin-barrier AlGaN/GaN heterostructure on Si substrates,” Applied Physics Express, vol. 12, no. 2, p. 024001, Feb. 2019.

4.       Y. Zhang, K. Wei, S. Huang*, et al., “High-Temperature-Recessed Millimeter-Wave AlGaN/GaN HEMTs With 42.8% Power-Added-Efficiency at 35 GHz,” IEEE Electron Device Letters, vol. 39, no. 5, pp. 727–730, May 2018.

5.       S. Huang, et al., “Ultrathin-Barrier AlGaN/GaN Heterostructure: A Recess-Free Technology for Manufacturing High-Performance GaN-on-Si Power Devices,” IEEE Transactions on Electron Devices, vol. 65, no. 1, pp. 207–214, Jan. 2018.

6.       X. Liu, X. Wang*, Y. Zhang, K. Wei, Y. Zheng, X. Kang, H. Jiang, J. Li, W. Wang, X. Wu, X. Wang, and S. Huang*, “Insight into the Near-Conduction Band States at the Crystallized Interface between GaN and SiN_x Grown by Low-Pressure Chemical Vapor Deposition,” ACS Appl. Mater. Interfaces, vol. 10, no. 25, pp. 21721–21729, Jun. 2018.

7.       S. Huang, et al., “Device physics towards high performance GaN-based power electronics,” 中国科学：物理学 天文学 , 2016年，第46卷，第10期: 107307.

8.       S. Huang, et al., “High Uniformity Normally-OFF GaN MIS-HEMTs Fabricated on Ultra-Thin-Barrier AlGaN/GaN Heterostructure,” IEEE Electron Device Letters, vol. 37, no. 12, pp. 1617–1620, Dec. 2016.

9.       Q. Bao, S. Huang*, et al., “Effect of interface and bulk traps on the C–V characterization of a LPCVD-SiN_x/AlGaN/GaN metal-insulator-semiconductor structure,” Semiconductor Science and Technology, vol. 31, no. 6, p. 065014, Jun. 2016.

10. Z. Liu, S. Huang*, et al., “Investigation of the interface between LPCVD-SiN_x gate dielectric and III-nitride for AlGaN/GaN MIS-HEMTs,” Journal of Vacuum Science & Technology B, vol. 34, no. 4, p. 041202, Jul. 2016.

11. Y. Shi, S. Huang*, et al., “Normally OFF GaN-on-Si MIS-HEMTs Fabricated With LPCVD-SiN_x Passivation and High-Temperature Gate Recess,” IEEE Transactions on Electron Devices, vol. 63, no. 2, pp. 614–619, Feb. 2016.

12. J. Zhang, S. Huang*, et al., “Mechanism of Ti/Al/Ti/W Au-free ohmic contacts to AlGaN/GaN heterostructures via pre-ohmic recess etching and low temperature annealing,” Appllied Physics Letters, vol. 107, no. 26, p. 262109, Dec. 2015.

13. S. Huang, et al., “High RF Performance Enhancement-Mode Al₂O₃/AlGaN/GaN MIS-HEMTs Fabricated With High-Temperature Gate-Recess Technique,” IEEE Electron Device Letters, vol. 36, no. 8, pp. 754–756, Aug. 2015.

14. S. Huang, et al., “O₃-sourced atomic layer deposition of high quality Al₂O₃ gate dielectric for normally-off GaN metal-insulator-semiconductor high-electron-mobility transistors,” Appllied Physics Letters, vol. 106, no. 3, p. 033507, Jan. 2015.

15. S. Huang, et al., “High-temperature low-damage gate recess technique and ozone-assisted ALD-grown Al₂O₃ gate dielectric for high-performance normally-off GaN MIS-HEMTs,” in 2014 IEEE International Electron Devices Meeting, 2014, p. 17.4.1-17.4.4.

16. S. Huang, et al., “High-fmax High Johnson’s Figure-of-Merit 0.2-um Gate AlGaN/GaN HEMTs on Silicon Substrate With AlN/SiNx passivation,” IEEE Electron Device Letters, vol. 35, no. 3, pp. 315–317, Mar. 2014.

17. S. Huang, et al., “Mechanism of PEALD-Grown AlN Passivation for AlGaN/GaN HEMTs: Compensation of Interface Traps by Polarization Charges,” IEEE Electron Device Letters, vol. 34, no. 2, pp. 193–195, Feb. 2013.

18. S. Huang, et al., “Effective Passivation of AlGaN/GaN HEMTs by ALD-Grown AlN Thin Film,” IEEE Electron Device Letters, vol. 33, no. 4, pp. 516–518, 2012.

19. S. Huang, et al., “Threshold Voltage Instability in Al₂O₃/GaN/AlGaN/GaN Metal–Insulator–Semiconductor High-Electron Mobility Transistors,” Japanese Journal of Applied Physics, vol. 50, no. 11, p. 110202, Oct. 2011.

20. S. Huang, et al., “Effects of the fluorine plasma treatment on the surface potential and Schottky barrier height of Al_xGa_1？xN/GaN heterostructures,” Appllied Physics Letters, vol. 96, no. 23, p. 233510, Jun. 2010.

21. S. Huang, et al., “Study of the leakage current mechanism in Schottky contacts to Al_0.25Ga _0.75N/GaN heterostructures with AlN interlayers,” Semiconductor Science and Technology, vol. 24, no. 5, p. 055005, May 2009.

22.     S. Huang, et al., “Current transport mechanism of Au∕Ni∕GaN Schottky diodes at high temperatures,” Appllied Physics Letters, vol. 91, no. 7, p. 072109, Aug. 2007.

Research Interests  

Advanced fabrication, design, characterization techniques for III-nitride compound semiconductor electronic devices

1, High performance GaN-based power electronic and RF/microwave devices, including enhancement-mode (E-mode) technique, design of high-frequency GaN-based electronic devices, CMOS-process-compatible fabrication technique, novel structure GaN-based HEMTs and MIS-HEMTs

2, Device physics in III-nitride compound semiconductor electronic devices, such as interface engineering, reliability, and advanced characterization techniques

Projects and Subjects Participated

National Natural Science Foundation of China (No. 61534007, 61527816, 61822407, 11634002, and 61631021);

Key Research Program of Frontier Sciences of Chinese Academy of Sciences (CAS) (No. QYZDB-SSW-JSC012);

Opening Project of Key Laboratory of Microelectronic Devices & Integrated Technology, Institute of Microelectronics, CAS

Honour  

IEEE Senior Member