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WU Zhenhua
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Update time: 2017-04-06
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Name

Wu Zhenhua

Gender

Name

Title

Professor

Nationality

Title

Education

Ph.D

E-Mail

Education

Department

Integrated Circuit Advanced Process Center, Institute of Microelectronics, Chinese Academy of Sciences.

Address

3 Beitucheng West Road, Chaoyang District, Beijing, PR China

Postcode

100029

Tel

010-82995791

Fax

 

Education Background

2006/09-2011/07, Institute of Semiconductors, Chinese Academy of Sciences, Beijing, China, Ph.D., Condensed Matter Physics.

2002/09-2006/06, Nanjing University, Nanjing, China B.S., Microelectronics.

Professional Experience

2016/06-Present, Professor, Integrated Circuit Advanced Process Center, Institute of Microelectronics, Chinese Academy of Sciences. 

2013/03-2016/05, Senior Engineer, Semiconductor Research Center, Samsung Electronics, Korea.

2011/09-2013/03, Engineer, Semiconductor Research Center, Samsung Electronics, Korea.

2009/02-2009/05, HongKong City University, HongKong, China, Research Assistant.

Publications

Advanced technology node Simulation DTCO,

1. Luo, Y.; Zhang, Q.; Cao, L.; Gan, W.; Xu, H.; Cao, Y.; Gu, J.; Xu, R.; Yan, G.; Huo, J.;Wu, Zhenhua*, Yin, H.*, Investigation of Novel Hybrid Channel Complementary FET Scaling Beyond 3-nm Node from Device to Circuit,IEEE Transactions on Electron Devices, 2022, in press, doi:10.1109/TED.2022.3176843. [通讯作者]

 

2. Huang, S.#;Wu, Zhenhua#; Xu, H.; Guo, J.; Xu, L.; Duan, X.; Chen, Q.; Yang, G.; Zhang, Q.; Yin, H.; Wang, L.*; Li, L.*; Liu, Ming, Geometric Variability Aware Quantum Potential based Quasi-ballistic Compact Model for Stacked 6nm-Thick Silicon Nanosheet GAA-FETs, 2021,International Electron Devices Meeting(IEDM). [共同一作]

 

3. Zhao. Y.; Wang, L.;Wu, Zhenhua, Schanovsky, F.; Xu, X.; Yang, H.; Yu, H.; Lai, J.; Liu, D.; Chuai, X.; Su, Y.; Wang, X.; Li, L.*; Liu, Ming*, A Unified Physical BTI Compact Model in Variability-Aware DTCO Flow: Device Characterization and Circuit Evaluation on Reliability of Scaling Technology Nodes, 2021,Symposium on VLSI Technology(VLSI). [第三作者]

 

4. Yao, J.; Li, J.; Luo, K.; Yu, J.; Zhang, Q.; Hou, Z.; Gu, J.; Yang, W.;Wu Zhenhua*; Yin, H.; Wang, W.,Physical Insights on Quantum Confinement and Carrier Mobility in Si,Si0.45Ge0.55, Ge Gate-All-Around NSFET for 5 nm Technology Node.J. Elec. Dev. Soc., 2018 6, 841. [通讯作者]

 

Beyond Moore materials, Devices path-finding

5. Gan, W.; Prentki, R.; Liu, F.; Bu, J.; Luo, K.; Zhang, Q.; Zhu, H.; Wang, W.; Ye, T.; Yin, H.;Wu, Zhenhua*; Guo Hong*, Design and Simulation of Steep-Slope Silicon Cold Source FETs With Effective Carrier Distribution Model,IEEE Transactions on Electron Devices, 2020, 67(6), 2243. [通讯作者]

6. Zhou, M.; Zhou, C.; Luo, K.; Li, W.; Liu, J.*; Liu, Z.;Wu, Zhenhua*, Ultrawide bandwidth and sensitive electro-optic modulator based on a graphene nanoelectromechanical system with superlubricity, Carbon, 2021, 176: 228. [通讯作者]

7. Xia, Y.; Guo, S.; Xu, L.; Guo, T.;Wu, Zhenhua*; Zhang, S.*; Sensing Performance of SO2, SO3 and NO2 Gas Molecules on 2D Pentagonal PdSe2: A First-principle Study,IEEE Electron Device Letters, 2021, 42: 573. [通讯作者]

8.Wu, Zhenhua; Zhai, F.; Peeters, F. M.; Xu, H. Q.; Chang, Kai*, Valley-Dependent Brewster Angles and Goos-Hanchen Effect in Strained Graphene,Physical Review Letters, 2011, 106(17), 176802. [第一作者]

 

Machine Learning in TCAD.

9. Xu, H.; Gan, W.; Cao, L.; Yang, C.; Wu, J.; Zhou, M.; Qu, H., Zhang, S.*; Yin, H.;Wu, Zhenhua*,A Machine Learning Approach for Optimization of Channel Geometry and Source/Drain Doping Profile of Stacked Nanosheet Transistors,IEEE Transactions on Electron Devices, 2022, in press, doi: 10.1109/TED.2022.3175708. [通讯作者]

10. Yang, Q.; Qi, G.; Gan, W.;Wu, Zhenhua*, Yin, H.; Chen, T.; Hu, G.; Wan, J.; Yu, S.; Lu, Y.*, Transistor Compact Model Based on Multigradient Neural Network and Its Application in SPICE Circuit Simulations for Gate-All-Around Si Cold Source FETs,IEEE Transactions on Electron Devices, 2021, 68(9): 4181. [通讯作者]

 

Research Interests  

GAA, CFET based CMOS technology DTCO path-finding,

Beyond Moore, novel materials and device technology path-finding.

New-mechanism nano device with quantum effect.

Advanced TCAD Simulation Methodology.

Patents Application

(1)      H. Zhu,Zhenhua Wu., Semiconductor device, manufacturing method thereof, and electronic device including the device, US Patent 16845351, 2019.

(2)      M. Cantoro;Zhenhua Wu; K. Bhuwalka; S. Kim; S. Maeda, Semiconductor devices including field effect transistors and methods of forming the same, US Patent 10868125, 2020.

(3)      K. Bhuwalka;Zhenhua Wu; U. Kwon; K. Lee, Semiconductor devices having tapered active regions, US Patent 10418448, 2019.

 

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