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Recent papers:
[1]Q. Huo, Feng zhang* et al. Demonstration of 3D Convolution Kernel Function Based on 8-layer 3D Vertical Resistive Random Access Memory. IEEE Electron Device Letters, 2020.
[2]Q. Huo, Feng zhang* et al. Physics-Based Device-Circuit Cooptimization Scheme for 7-nm Technology Node SRAM Design and Beyond. IEEE Transactions on Electron Device, 2020.
[3]Q. Huo, Feng Zhang* et al. A Novel General Compact Model Approach for 7-nm Technology Node Circuit Optimization from Device Perspective and Beyond. IEEE Journal of the Electron Devices Society.2020
[4]Lei dengyun, Feng Zhang* et al. Effect of Moisture Stress on the Resistance of HfO2/TaOx-based 8-Layer 3D Vertical Resistive Random Access Memory.IEEE Electron Device Letters, 2019.
[5]Yiming Wang, Feng Zhang* et al. A Few-Step and Low-Cost Memristor Logic Based on MIG Logic for Frequent-Off Instant-On Circuits in IoT Applications.IEEE transactions on circuits and systems II.2019.
[6]Ying Zhao, Feng Zhang*, et al .A Compact Model for Drift and Diffusion Memristor Applied in Neuron Circuits Design . IEEE Transactions on Electron Device, 2018.
[7]Feng Zhang, Fan Dongyu, Duan Yuan,MengFan Chang,Ming Liu. A 130nm 1Mb HfOxEmbedded RRAM Macro Using Self-Adaptive Peripheral Circuit System Techniques for 1.6X Work Temperature Range. 2017 IEEE Asian solid-state conference.
[8]Xiaowei Han, Hongbin sun, Huangqiang Wu, Feng Zhang, Ming Liu et al.A 0.13um 64Mb HfOxReram using configurable ramped voltage write and low read-disturb sensing techniques for reliability improvement. 2017 IEEE custom integrated circuits conference.
[9]Nan QI, Patrick Yin Chiang, Feng Zhang*,Ming Liu. A 51Gb/s, 320mW, PAM4 CDR with Baud-Rate Sampling for High-Speed Optical Interconnects.2017 IEEE Asian solid-state conference.
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